Contents

• 1. Structure of Computers
  • 1.1 Computer types
    • 1.1.1 Analog Computers
    • 1.1.2 Digital Computers
  • 1.2 Structure of a digital computer
  • 1.3 Structure of each subsystem
  • 1.4 Faster computing
  • 1.5 Software
  • 1.6 Performance
  
  
• 2. Number Systems
  • 2.1 Unsigned Numbers
    • 2.1.1 Integer Conversion
    • 2.1.2 Fractional Conversion
  • 2.2 Signed Numbers
    • 2.2.1 Signed-magnitude
    • 2.2.2 Diminished Radix-complement
    • 2.2.3 Radix-complement
  • 2.3 Floating-point numbers
    • 2.3.1 Structure of a floating-point number
    • 2.3.2 The components of a floating-point number
  
  
• 3. Codes
  • 3.1 Binary Coded Decimal (BCD)
  • 3.2 Weighted Codes
    • 3.2.1 Positive Weighted Codes
    • 3.2.2 Number of Possible Codes
    • 3.2.3 Negative-weighted codes
  • 3.3 Unweighted Codes
    • 3.3.1 Excess-3 Code
    • 3.3.2 Gray Code
  • 3.4 Properties of Codes
    • 3.4.1 Self-complementing Codes
    • 3.4.2 Reflective Codes
  • 3.5 Control of Transmission Errors
    • 3.5.1 Sources of Transmission Errors
    • 3.5.2 Error Detecting Codes
    • 3.5.3 Error Correcting Codes (Hamming Codes)
    • 3.5.4 Single-error Correcting, Double-error Detecting Codes
    • 3.5.5 Polynomial Codes
  • 3.6 Alphanumeric Codes
    • 3.6.1 ASCII
    • 3.6.2 EBCDIC
    • 3.6.3 Latin-1
    • 3.6.4 Unicode
  
  
• 4. Binary Arithmetic Operations
  • 4.1 Shifting Binary Numbers
    • 4.1.1 Right Shift
    • 4.1.2 Left Shift
  • 4.2 Addition and Subtraction of Signed Binary Integer Numbers
    • 4.2.1 Signed-magnitude Numbers
    • 4.2.2 One's-complement Numbers
    • 4.2.3 Two's-complement Numbers
  • 4.3 Multiplication of Integer Binary Numbers
    • 4.3.1 Signed-magnitude Numbers
    • 4.3.2 One's-complement Numbers
    • 4.3.3 Two's-complement Numbers
  • 4.4 Division of Integer Binary Numbers
    • 4.4.1 Signed-magnitude Division
    • 4.4.2 One's-complement division
    • 4.4.3 Two's-complement division
  • 4.5 Arithmetic Operations on Floating-Point Numbers
    • 4.5.1 Addition and Subtraction
    • 4.5.2 Multiplication and Division
  
  
• 5. Assembly Language Programming
  • 5.1 Memory Addresses, Instructions and Data
  • 5.2 Instruction Sequencing
  • 5.3 Register Transfer Notation and Assembly Language
  • 5.4 Parts of an Instruction
  • 5.5 Basic Instructions
  • 5.6 Number of Addresses and Simple Programs
    • 5.6.1 Four-address Format
    • 5.6.2 Three-address Format
    • 5.6.3 General-purpose Register Computer
    • 5.6.4 Two-address Format
    • 5.6.5 One-address Format
  • 5.7 Branching and Condition Codes
  • 5.8 Methods of Addressing
    • 5.8.1 Immediate Addressing
    • 5.8.2 Register Addressing
    • 5.8.3 Direct Addressing
    • 5.8.4 Indirect Addressing and Pointers
    • 5.8.5 Indexing and Arrays
    • 5.8.6 Base and Indexing Addressing
    • 5.8.7 Base, Index, and Offset Addressing
    • 5.8.8 Relative Addressing
    • 5.8.9 Autoincrement and Autodecrement
  • 5.9 The Assembler
    • 5.9.1 Two-pass Assembler
    • 5.9.2 Assembler Directives
    • 5.9.3 An Assembled Program
  • 5.10 The Linker-Loader
  • 5.11 Typical Instructions
    • 5.11.1 Integer Arithmetic Instructions
    • 5.11.2 Floating-point Arithmetic Instructions
    • 5.11.3 Decimal Arithmetic Instructions
    • 5.11.4 Data Conversion Instructions
    • 5.11.5 Shifting Instructions
    • 5.11.6 Logic Instructions
    • 5.11.7 Word and Byte Transmission Instructions
    • 5.11.8 Control and Branch Instructions
    • 5.11.9 Sense Indicators and Status Instructions
  • 5.12 Input/Output
  • 5.13 Stacks
  • 5.14 Subroutines
    • 5.14.1 Nested Subroutines
    • 5.14.2 Passing Parameters to a Subroutine
    • 5.14.3 The Stack Frame
    • 5.14.4 Nested Subroutines -- Example
  
  
• 6. MIPS
  • 6.1 MIPS Architecture
    • 6.1.1 General info
  • 6.2 Registers
    • 6.2.1 General-purpose Registers
    • 6.2.2 Dedicated Registers
    • 6.2.3 Floating-point Registers
  • 6.3 Memory Addresses
    • 6.3.1 Byte Addressing
    • 6.3.2 Word Addressing
    • 6.3.3 Half-word Addressing
    • 6.3.4 Double-word Addressing
  • 6.4 Methods of Addressing and Instruction Formats
    • 6.4.1 Format of an Instruction
    • 6.4.2 Methods of Addressing
  • 6.5 Arithmetic and Logical Instructions
  • 6.6 Multiplication Instructions
  • 6.7 Division Instructions
  • 6.8 Logic Instructions
  • 6.9 Shifting Instructions
  • 6.10 Load and Store Instructions
    • 6.10.1 Load Instructions
    • 6.10.2 Store Instructions
  • 6.11 Branch and Jump Instructions
    • 6.11.1 Branch Instructions
    • 6.11.2 Jump Instructions
  • 6.12 Comparison Instructions
    • 6.12.1 Set Less Than
    • 6.12.2 Set Less Than Immediate
    • 6.12.3 Set Less Than Unsigned
    • 6.12.4 Remaining Comparison Instructions
  • 6.13 Constant-manipulating Instructions
  • 6.14 Data Movement Instructions
    • 6.14.1 Move from hi
    • 6.14.2 Move from lo
    • 6.14.3 Move to hi
    • 6.14.4 Move to lo
    • 6.14.5 Move from coprocessor z
    • 6.14.6 Move to coprocessor z
    • 6.14.7 Move instructions -- Pseudo-instructions
  • 6.15 Floating-point Instructions
    • 6.15.1 Floating-point absolute value
    • 6.15.2 Floating-point addition
    • 6.15.3 Floating-point subtraction
    • 6.15.4 Floating-point multiplication
    • 6.15.5 Floating-point division
    • 6.15.6 Move floating-point
    • 6.15.7 Negate floating-point
    • 6.15.8 Convert double (integer) to single
    • 6.15.9 Convert single (integer) to double
    • 6.15.10 Convert floating-point to integer
    • 6.15.11 Compare equal
    • 6.15.12 Compare less than
    • 6.15.13 Compare less than equal
    • 6.15.14 Load floating-point
    • 6.15.15 Store floating-point
  • 6.16 Exceptions and Interrupt Instructions
  
  
• 7. Intel IA-32
  • 7.1 Introduction
  • 7.2 History of Intel Computers
  • 7.3 Addressable Registers
    • 7.3.1 General-purpose Register
    • 7.3.2 Status Register
    • 7.3.3 Segment Registers and Operating Modes
    • 7.3.4 Floating-point Registers
    • 7.3.5 MMX-Registers
    • 7.3.6 SSE (XMM) Registers
  • 7.4 Data Types
    • 7.4.1 Fundamental Data Types
    • 7.4.2 Memory Addresses
    • 7.4.3 Alignment of Data
    • 7.4.4 Numeric Data Types
    • 7.4.5 Pointer Data Types
    • 7.4.6 Bit Field and String Data Types
    • 7.4.7 Packed SIMD Data Types
    • 7.4.8 BCD and Packed BCD Integer Data Types
    • 7.4.9 Floating-point Data Types
  • 7.5 Methods of Addressing (Addressing Modes)
    • 7.5.1 Immediate Mode
    • 7.5.2 Direct Mode
    • 7.5.3 Register Mode
    • 7.5.4 Register Indirect Mode
    • 7.5.5 Base and Displacement Mode
    • 7.5.6 Index and Displacement Mode
    • 7.5.7 Base and Index Mode
    • 7.5.8 Base with Index and Displacement Mode
  • 7.6 Instruction Formats
    • 7.6.1 Specifying Registers
    • 7.6.2 Prefixes
  • 7.7 Instruction Types
    • 7.7.1 Integer Arithmetic Instructions
    • 7.7.2 ASCII and Decimal Arithmetic Instructions
    • 7.7.3 Logic Instructions
    • 7.7.4 Shift and Rotate Instructions
    • 7.7.5 Data Conversion Instructions
    • 7.7.6 Flag Instructions
    • 7.7.7 Conditional Jump Instructions
    • 7.7.8 Unconditional Jump Instructions
    • 7.7.9 Comparison Instructions
    • 7.7.10 Data Movement Instructions
    • 7.7.11 String Instructions
    • 7.7.12 Floating-point Instructions
    • 7.7.13 MMX Instructions
    • 7.7.14 SSE Instructions
    • 7.7.15 Operating System Instructions
  
  
• Index